Investor connect
Back the chip going on
India's wheels
Entra is building VAAYU, an indigenous TPMS system-on-chip, from IIT Dharwad. We are opening conversations with investors who want to be part of India's semiconductor story early.
The opportunity
Why TPMS silicon, why now
01
Regulation is creating the market
AIS-154 in India and UN ECE R141 internationally require tyre-pressure monitoring on new vehicles. Demand follows the mandate, not a marketing budget.
02
The chips are imported today
TPMS modules fitted in India rely on chips designed and sourced abroad. A domestic chip shortens the supply chain and keeps the value in the country.
03
Three segments, one chip
VAAYU is designed to serve two-wheelers, passenger vehicles and commercial vehicles, with ICE and electric drivetrains, from a single SoC.
04
India is backing chip design
National programmes now fund and recognise indigenous chip design. VAAYU is being developed under MeitY's Chips to Startup (C2S) Programme.
Progress
What is already in place
Dr. M. J. Zarabi Indigenisation Award
Inaugural winner at India Mobile Congress 2026, for VAAYU.
MeitY Chips to Startup (C2S)
VAAYU is developed under MeitY's C2S Programme, Government of India.
dhaRti Foundation, IIT Dharwad
Incubated on campus, with access to the institute's labs and faculty.
FPGA prototype running
VAAYU's digital design has been prototyped on an FPGA.
Pitched live at SEMICON India 2026
Ritesh Belgudri and Dr. Nagaveni S presented Entra at Startup Mitra, the investor pitch forum of SEMICON India 2026, with investors in the room.
A month later Entra took first rank at the Emerging Technologies Hackathon 2026, organised by TCOE India.
Why Entra
A tier-2 base is our advantage
We are a new-generation product startup building deep tech outside the metros, for India first and then the world.
Capital goes further in Dharwad
A campus lab in a tier-2 city means more of every rupee goes into engineering and silicon.
Faculty founders, industry operators
Two IIT Dharwad faculty in VLSI and networks, an FPGA industry veteran as CEO who is also a Visvesvaraya PhD Scheme scholar, and a go-to-market lead.
A product company with its own IP
We are fully product-based. Digital, analog and RF are designed by our own team, so the IP is ours.
A talent pipeline next door
IIT Dharwad and the engineering colleges of North Karnataka supply engineers who want to stay.
Beyond VAAYU
A pipeline, not a single product
VAAYU is the focus. These programmes are in progress behind it.
FPGA fabric
In progressAkriti
A programmable fabric generator that uses agentic AI and open-source EDA tools to produce embedded programmable fabric IP.
O-RAN
In progressTarang
Energy-efficient, AI-enabled Open RAN: an O-RU with low-PHY (split 7.2) and an intelligent RIC, built on FPGA accelerators.
Skilling programme
In progressSilicon Vidyalaya
Our school for silicon. A hands-on FPGA skilling programme with federated remote-lab access, for students and working engineers.
Connect
Talk to the founders
Tell us a little about your fund or interest and we will set up a conversation.
Available on request
- Pitch deck
- Product and silicon roadmap
- Technical deep-dive with the founders
Prefer email? Write to contact@entra-in.com.